Agenda
Time |
Agenda |
09:15 |
"Welcome " |
09:45 |
"IP Market Demands and Offers" |
10.15 |
Break |
10.45 |
"Evolution of Analog to Digital Converters" |
11.15 |
"Fractional-N PLLs : Versatile Frequency Synthesis Building Block" |
11.45 |
"New struggle on multimedia Audio Converters: How Dolphin Integration reduced the fabrication costs?" |
12.15 |
Lunch |
13.30 |
"8-bit to 32-bit processor and micro controller IP from CAST" |
14.00 |
"Why using Single Root I/O Virtualization (SR-IOV) can help improve your design performance and reduce costs" |
14.30 |
"Data Management Engine " |
15.30 |
Break |
16. 30 |
"Seminar on Enterprise Management Platform: From IP to License management" |
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